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Job Description:

The FTS (Frequency and Time Systems) development team is looking for an experienced digital design engineer. The FTS systems group produces network timing equipment such as PTP Grandmasters and NTP servers. The position involves creating and maintaining FPGA IP units and full FPGA system designs. The team member will participate in all aspects of the design cycle: collaboration with HW/SW/Marketing/Test/Manufacturing teams, initial planning, high-level specification, detailed design and documentation, simulation/verification, hardware bring-up/testing, and product sustaining.

Responsibilities:

• Work with members of cross-functional teams to define new product features.

• Create functional FPGA IP (Intellectual Property) units from an initial idea.

• Assemble multiple IP complexes into a full FPGA system design including CPU subsystem, PLLs, block RAMs, DSPs, transceivers, custom IP, etc.

• Write detailed documentation for IP and FPGA designs.

• Create test benches to simulate and verify IP units.

• Successfully build and test complex FPGA designs.

• Work with hardware engineers to bring-up new boards and FPGA designs.

• Write/create tools to use for testing.

• Support SW engineers in development and debugging of drivers for FPGA units.

• Work with FPGA engineers to learn existing IP and FPGA designs.

Requirements/Qualifications:

Required:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or similar.

• 12.5+ years of FPGA/ASIC IP and system design experience.

• Experience with VHDL and/or Verilog.

• Hands-on experience with FPGA/ASIC design and verification.

• Strong understanding of digital design concepts and principles.

• Excellent analytical and problem-solving skills.

• Excellent knowledge of digital systems and computer architecture.

• Excellent communication (written and verbal), and documentation skills.

• Attention to detail and ability to drive tasks to completion independently in timely manner.

Preferred:

• Experience with Ethernet design, IEEE 1588 PTP and NTP protocols.

• Experience with clock/frequency synthesis and measurement.

• Experience with FPGA build tools, e.g., Libero, Quartus, or Vivado.

• Experience with FPGA debug tools, e.g., Identify Debugger, SignalTap, or ChipScope.

• Experience with a simulation tool, e.g., ModelSim/QuestaSim.

• Experience with Python, TCL and/or other scripting languages.

• Experience with board-level design.

Travel Time:

Physical Attributes:

Physical Requirements:

Pay Range:

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the EEO is the Law Poster and the EEO is the Law Poster Supplement. Please also refer to the Pay Transparency Policy Statement.